Whole harmonic distortion (THD) is the harmonic distortion current in a sign, outlined because the ratio of the root-mean sq. (RMS) amplitude of a set of upper harmonic frequencies to the RMS amplitude of the primary harmonic, or basic frequency. Equation 1 expresses THD:
the place Vn is the RMS worth of the nth harmonic and V1 is the RMS worth of the elemental element.
In energy techniques, these harmonics could cause issues starting from phone transmission interference to conductor degradation; subsequently, it is very important management the overall THD. A decrease THD means a decrease peak present, much less heating, decrease electromagnetic emissions, and fewer core loss in motors.
Decreasing THD wants an influence issue correction (PFC), which is required for AC/DC energy provides which have enter energy higher than 75 W. PFC forces the enter present to observe the enter voltage such that the electronics load attracts a sinusoidal present waveform that incorporates minimal harmonics.
THD necessities have turn into stricter, particularly in server purposes. The Modular {Hardware} System-Widespread Redundant Energy Provide (M-CRPS) specification [1] defines a really strict THD requirement throughout the complete load vary, as proven in Desk 1. That is a lot stricter than the earlier CRPS THD specification.
Desk 1 The M-CRPS THD specification. Supply: Texas Devices
Assembly such strict THD specs is a giant problem in PFC designs the place conventional loop tuning will not be sufficient. On this article, I’ll recommend a number of additional strategies to assist cut back THD.
Guarantee that the sensed alerts are clear
The PFC controller senses the AC enter voltage, inductor present and PFC output voltage. These sensed alerts should be clear; in any other case, they’ll have an effect on THD. For instance, as a result of the AC enter voltage sign generates a sinusoidal present reference, any spikes on the sensed sign will trigger present reference distortion and have an effect on THD.
Though the output voltage (VOUT) sign shouldn’t be used for producing a present reference, it might have an effect on THD as a result of the spikes on VOUT will trigger a ripple on the voltage-loop output, which impacts the current-loop reference and finally THD. If the spike’s magnitude is massive sufficient, it might set off a voltage-loop nonlinear achieve, considerably elevating THD.
One widespread observe is to place a decoupling capacitor near the sense pin of the controller. You’ll have to fastidiously choose the capacitance such that it’ll successfully cut back the noise however not trigger an excessive amount of delay. Utilizing a digital infinite impulse response filter to course of the sensed VOUT sign will additional cut back the noise; as a result of the PFC voltage loop is sluggish, the additional delay attributable to this digital filter is appropriate.
For AC voltage sensing, nonetheless, it’s not really useful so as to add a digital filter as a result of it’s going to trigger a delay on the present reference. On this case, you should use a firmware phase-locked loop (PLL) to generate an inner sine wave sign in section with the AC voltage, after which use that generated sine-wave sign to modulate the present reference. For the reason that PLL-generated sine wave is clear, even when there’s some noise on the sensed AC voltage, the current-loop reference can even be clear.
Scale back the present spikes at AC zero crossing
Present spikes at AC zero crossing are an inherent situation for the totem-pole bridgeless PFC. These spikes could be so huge that it turns into unimaginable to go M-CRPS THD specs. I’ve analyzed the basis trigger of those spikes [2], and famous {that a} pulse-width modulation (PWM) soft-start algorithm, as proven in Determine 1, will successfully cut back them.
Determine 1 Gate sign timing for AC zero crossing. Supply: Texas Devices
On this resolution, when VAC modifications from a unfavorable to a optimistic cycle after AC zero crossing, lively swap This fall activates first with a really small pulse width, then step by step will increase to the obligation cycle (D) generated by the management loop. A gentle begin on This fall step by step discharges the switch-node drain-to-source voltage (VDS) to zero. As soon as This fall’s gentle begin is full, synchronous transistor Q3 begins to activate. It begins with a tiny pulse width and step by step will increase till the heart beat width reaches 1-D. When This fall’s gentle begin is full and Q3’s gentle begin begins, the low-frequency swap Q2 activates.
The zero-crossing detection might be undesirably triggered by noise. For security functions, on the finish of the half AC cycle, flip off all the switches. This leaves a small lifeless zone that can stop the enter AC from short-circuiting. The transition from the AC optimistic cycle to the unfavorable cycle is similar. Determine 2 exhibits the take a look at outcome.
Determine 2 Present waveforms with out and with a PWM gentle begin: the standard management methodology (a) and PWM gentle begin (b). Supply: Texas Devices
Scale back voltage-loop results
The double-line frequency ripple on the voltage-loop output can have an effect on the present reference and thus THD. To scale back this frequency ripple impact as a lot as attainable—whereas on the identical time not sacrificing the load transient response—you can add a digital notch (band-stop) filter between the VOUT sensed sign and the voltage loop. This notch filter can successfully attenuate the double-line frequency ripple whereas nonetheless passing all different frequency alerts, together with the sudden VOUT change attributable to the load transient. The load transient won’t be affected.
One other strategy is to sense VOUT on the AC zero-crossing occasion. For the reason that VOUT worth at AC zero-crossing occasion Vout_zc(t) equals its common worth and it’s a “fixed” in steady-state, it’s the excellent suggestions sign for voltage-loop management. To deal with the load transient, use this voltage-loop management legislation:
If ((Vref – Vout(t) < Threshold)
{
Error = Vref – Vout_zc(t);
VoltageLoop_output = Gv(Error, Kp, Ki);
}
Else
{
Error = Vref – Vout(t);
VoltageLoop_output = Gv(Error, Kp_nl, Ki_nl);
}
If the instantaneous VOUT error is small, use the VOUT worth on the AC zero-crossing occasion Vout_zc(t) and small proportional-integral (PI) loop achieve Kp, Ki for voltage-loop compensator Gv. When a load transient happens inflicting an instantaneous VOUT error higher than the edge, use the instantaneous Vout(t) worth and PI loop achieve Kp_nl, Ki_nl for Gv to quickly deliver VOUT again to its nominal worth.
Oversampling
The PFC inductor present is a noticed wave with DC offset in every switching cycle; the present then goes to a signal-conditioning circuit equivalent to an operational amplifier to make the sign appropriate for the PFC management circuit. Nonetheless, this signal-conditioning circuit doesn’t present adequate attenuation to the enter present ripple. The present ripple nonetheless seems on the output of the amplifier. If this sign is sampled solely as soon as in every switching interval, there isn’t a excellent, mounted location the place the sign represents the common present all the time. Thus, with a single pattern, it is rather troublesome to attain good THD.
To get a extra correct suggestions sign, I like to recommend an oversampling mechanism. Determine 3 exhibits that it’s attainable to evenly pattern the present suggestions sign eight instances in each switching cycle, common the outcomes, and ship them to the management loop. This oversampling successfully averages the present ripple out such that the measured present sign will get nearer to the common present worth. Additionally, the controller turns into much less delicate to noise—each sign noise and measurement noise. Oversampling is without doubt one of the handiest methods to cut back present waveform distortions.
Determine 3 Oversampling eight instances in each switching cycle. Supply: Texas Devices
Responsibility-ratio feedforward
The essential concept of duty-ratio feedforward management [3] is to pre-calculate an obligation ratio, then add this obligation ratio to the suggestions controller. For a lift topology working in steady conduction mode, Equation 2 provides the obligation ratio (dFF) as:
This duty-ratio sample successfully produces a voltage throughout the swap whose common over a switching cycle is the same as the rectified enter voltage. A daily current-loop compensator modifications the obligation ratio round this calculated duty-ratio sample.
Determine 4 depicts the ensuing management scheme. After utilizing Equation 2 to calculate dFF, it’s then added to the standard common current-mode management output (dI). You can then use the ultimate obligation ratio (d) to generate a PWM waveform to regulate PFC.
Determine 4 Common current-mode management with dFF. Supply: Texas Devices
For the reason that majority of the obligation cycle is generated by duty-ratio feedforward, the management loop solely adjusts the calculated obligation barely. This system might help enhance THD for purposes with a restricted controller loop bandwidth.
AC cycle skipping
On the whole, it’s more durable to fulfill light-load THD necessities than heavy-load THD necessities; that is very true for the 5% load THD requirement within the M-CRPS specification. If the PFC meets all different THD necessities besides at a 5% load, even if in case you have tried all of the strategies talked about to date, an AC cycle-skipping methodology might help.
Consider AC cycle skipping as a particular burst mode: when the load is lower than a pre-defined threshold, the PFC enters this mode and, relying on the load, skips a number of AC cycles. In different phrases, the PFC turns off for a number of AC cycles and turns again on for the following AC cycle. The turn-on and turn-off occasion is on the AC zero crossing such that the entire AC cycle is skipped. Since PFC turn-on and turn-off at present equal zero, there’s much less stress and electromagnetic interference. AC cycle skipping is completely different than the standard PWM pulse-skipping burst mode, the place you skip PWM pulses randomly.
The variety of AC cycles to skip is reverse-proportional to the load; the much less load, the extra AC cycles skipped. Determine 5 exhibits the skipping of 1 AC cycle. Channel 1 is the AC voltage, and channel 4 is the AC present.
Determine 5 AC cycle skipping at a lightweight load. Supply: Texas Devices
When the PFC turns off as a result of the present is zero, THD is zero. For the reason that PFC must compensate for the turn-off interval, it delivers a considerable amount of energy when it activates, which is bigger than the common worth. Primarily, this operates the PFC both at medium load, or utterly turns off. Since THD is way decrease at a center load than at a lightweight load, light-load THD is decreased.
Check outcomes
I applied the strategies described on this article on a 3-kW totem-pole bridgeless PFC [5] managed by a Texas Devices C2000™ microcontroller. Determine 6 exhibits the THD take a look at outcome at 240 VAC.
Determine 6 THD take a look at outcomes. Supply: Texas Devices
The THD not solely meets the newest M-CRPS THD specs but additionally has loads of margin, which ensures that the PFC will meet specs throughout mass manufacturing, even with {hardware} tolerance.
Bosheng Solar is a techniques, purposes and firmware engineer at Texas Devices.
Associated Content material
References
- The Open Compute Undertaking. n.d. Open Prospects. Accessed April 10, 2023.
- Solar, Bosheng. “Learn how to Scale back Present Spikes at AC Zero Crossing for Totem-Pole PFC.” Texas Devices Analog Design Journal article, literature No. SLYT650, 4Q 2015.
- Van de Sype, D.M., Koen De Gusseme, A.P.M. Van den Bossche, and J.A. Melkebeek. “Responsibility-Ratio Feedforward for Digitally Managed Increase PFC Converters.” Printed in IEEE Transactions on Industrial Electronics 52, no. 1 (February 2005): pp. 108-115.
- Solar, Bosheng. “AC Cycle Skipping Improves PFC Gentle-Load Effectivity.” Texas Devices Analog Design Journal article, literature No. SLYT585, 3Q 2014.
- Texas Devices. n.d. “3-kW, 180-W/in3 Single-Section Totem-Pole Bridgeless PFC Reference Design with 16-A Max Enter.” Texas Devices reference design No. PMP23069. Accessed April 10, 2023.
